The present invention relates to the field of semiconductor technology, and in particular relates to a semiconductor device and a method of forming the same.
With the continuing development of semiconductor technologies, the improvements in the performance of integrated circuits are mainly achieved through shrinking the size of the integrated circuit device and increasing its speed. Currently, because the pursuit of high-density, high performance and low cost in the semiconductor industry has progressed to nano-technology process node, especially when the semiconductor device dimensions have been reduced down to 22 nm or below, manufacturing and design challenges have led to three-dimensional designs such as the development of the fin field effect transistors (FinFET).
Compared with conventional planar transistors, FinFET devices have superior performance in terms of channel control and reduced shallow trench effect and so on. FIG. 1 shows a schematic perspective view of a typical FinFET. A typical FinFET includes: a semiconductor substrate 100; a fin 101 disposed on the semiconductor substrate 100; and a gate structure 102 disposed across and above the fin 101. For example, the gate structure 102 may include a gate dielectric layer and a gate electrode layer. The FinFET further includes an isolation layer 103 surrounding the bottom of the fin 101. In the FinFET, under the control of the gate electrode, a conductive channel is produced in three sides of the fin 101 (in the left, right, and top surfaces shown in FIG. 1). That is, the portion of the fin 101 located below the gate electrode serves as a channel region, and the source and drain regions are located on both sides of the channel region.
Since the bottom of the fin 101 is surrounded by a silicon oxide isolation layer 103, this portion of the fin 101 cannot be effectively controlled by the gate electrode. Thus, even in the off state, it is possible to form a current path between the source and drain regions through the bottom of the fin 101, causing a leakage current.
Therefore, there is a need for an improved semiconductor device and manufacturing method to reduce the leakage current in the fin bottom.